Method and apparatus for advanced interprocess communication
US8286188B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Apr 28, 2008 |
| Grant date | Oct 9, 2012 |
| Priority date | — |
| Expiry date | Aug 10, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/1663
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An interprocess memory controller is described that may be used to provide multiple processes within a multi-process device with access to a shared physical memory. The described interprocess memory controller may enforce access rights to shared memory that has been allocated to the respective processes, thereby guarding the multi-process device from instability due to the unauthorized overwriting and/or unauthorized freeing of allocated memory. The described interprocess memory controller approach may streamline interprocess communication by allowing data associated with an interprocess communication to be passed from a first process to a second process by passing a pointer as well as access rights to a buffer in shared memory that contains the message data. In this manner, the described interprocess memory controller approach may avoid the inefficiency of interprocess communication approaches that copy message data from a shared memory controlled by a first process to a shared memory controlled by a second process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.