Optical communication in a ramp-stack chip package
US8290319B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 25, 2010 |
| Grant date | Oct 16, 2012 |
| Priority date | — |
| Expiry date | Apr 23, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19104
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A ramp-stack chip package is described. This chip package includes a vertical stack of semiconductor dies or chips that are offset from each other in a horizontal direction, thereby defining a stepped terrace. A high-bandwidth ramp component, which is positioned approximately parallel to the stepped terrace, is mechanically coupled to the semiconductor dies. Furthermore, the ramp component includes an optical waveguide that conveys the optical signal, and an optical coupling component that optically couples the optical signal to one of the semiconductor dies, thereby facilitating high-bandwidth communication of the optical signal between the semiconductor die and the ramp component.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.