Semiconductor memory device and method of manufacturing the same
US8294209B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 24, 2010 |
| Grant date | Oct 23, 2012 |
| Priority date | — |
| Expiry date | Jan 31, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D88/00
Abstract
A semiconductor memory device includes a plurality of active pillars protruding from a semiconductor substrate, a first gate electrode disposed on at least one sidewall of the active pillar, a first gate insulating layer being disposed between the active pillar and the first gate electrode, a second gate electrode disposed on at least one sidewall of the active pillar over the first gate electrode, a second gate insulating layer being disposed between the active pillar and the second gate electrode, first and second body regions in the active pillar adjacent to respective first and second respective electrodes, and first through third source/drain regions in the active pillar arranged alternately with the first and second body regions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.