Patent · US Active

Method and apparatus for performing wear leveling in memory

US8296539B2 · kind B2 · utility

5Cited by
5References
12Claims
0Family size

Assignee

Inventors

Key dates

Filing dateApr 28, 2008
Grant dateOct 23, 2012
Priority date
Expiry dateApr 3, 2029

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2212/7211
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A method for performing wear leveling in a memory, and an apparatus corresponding to the method, is provided. The method includes: dividing the lifecycle of the memory which includes more than one physical blocks into at least one sampling interval; for each sampling interval, getting the first physical block by taking statistics of the degree of the wear leveling of each physical block in the memory in the current sampling interval; getting the second physical block by taking statistics of the updating times of each logical address in the current sampling interval; exchanging the logical addresses and data of the first physical block and the second physical block.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.