Systems and methods for thread assignment and core turn-off for integrated circuit energy efficiency and high-performance
US8296773B2 · kind B2 · utility
22Cited by
2References
24Claims
0Family size
Assignee
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Key dates
| Filing date | Jun 30, 2008 |
| Grant date | Oct 23, 2012 |
| Priority date | — |
| Expiry date | Aug 24, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/5094
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method for improving efficiency of a multi-core architecture includes, in accordance with a workload, determining a number of cores to shut down based upon a metric that combines parameters to represent operational efficiency. Threads of the workload are reassigned to cores remaining active by assigning threads based on priority constraints and thread execution history to improve the operational efficiency of the multi-core architecture.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.