Control method of information processing device and information processing device
US8301969B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 26, 2008 |
| Grant date | Oct 30, 2012 |
| Priority date | — |
| Expiry date | Mar 24, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/349
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A transmitting side device (10) and a receiving side device (20) are connected to each other via a bus (30) comprising TAG bits (31), data bits (32) and error detection/correction ECC bits (33). The transmitting side device (10) uses a redundant bit inversion circuit (14) to invert different bits of the ECC bits (33) corresponding to trigger signals (41 & 42). In the receiving side device (20), a determination circuit (24), which has received an error report signal (26) from an error detection/correction circuit (22), determines, from the position of an error bit in the ECC bits (33), which one of the trigger signals (41 & 42) has been transmitted from the transmitting side device (10).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.