Amplifier with digital input and digital PWM control loop
US8305246B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 28, 2010 |
| Grant date | Nov 6, 2012 |
| Priority date | — |
| Expiry date | Jan 18, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M3/506
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A class D amplifier is configured to accept a digital input signal wherein the control loop of the class D amplifier employs a hybrid filter merged with the front-end of a sigma-delta ADC converter. The term hybrid refers to the filter using both digital and analog components in which the digital delay elements serve as shift registers while the filter coefficients are analog. The filter converts the digital PDM data into a step-wise sinusoidal signal. The sigma-delta ADC receiving a feedback signal subtracts the step-wise sinusoidal signal from the continuous sinusoidal signal and converts the result to a digital PDM signal, without decimation, which passes through a digital filter, a PWM generator, and a pre-driver, to provide power to the load.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.