Method of configuring a semiconductor integrated circuit involving capacitors having a width equal to the length of active resistors
US8307318B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 4, 2009 |
| Grant date | Nov 6, 2012 |
| Priority date | — |
| Expiry date | Nov 21, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/811
Abstract
A method of configuring a semiconductor integrated circuit (IC) includes arranging a circuit region in the center of a unit cell. Capacitor/resistor regions are arranged along the left and right edge portions of the unit cell. The capacitor/resistor regions include a plurality of active resistors having the same length and a capacitor having a width equal to the length of the plurality of active resistors. In addition, a first conductive layer is arranged longitudinally in each of the capacitor/resistor regions so as to contact the left and right edge portions of the unit cell.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.