Semiconductor device having plural semiconductor chips laminated to each other
US8310382B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 8, 2010 |
| Grant date | Nov 13, 2012 |
| Priority date | — |
| Expiry date | Jan 13, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3011
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In a stacked semiconductor device in which a plurality of through silicon vias used for data transfer are shared among a plurality of semiconductor chips, a first semiconductor chip included in the semiconductor chips holds through silicon via switching information for specifying a through silicon via among the through silicon vias to be used for data transfer, and transfers the through silicon via switching information to a second semiconductor chip included in the semiconductor chips. According to the present invention, because the through silicon via switching information is transferred from the first semiconductor chip to the second semiconductor chip, a circuit for storing the through silicon via switching information in a nonvolatile manner is not required in the second semiconductor chip. With this arrangement, a chip area of the second semiconductor chip can be reduced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.