Multi-core geometry processing in a tile based rendering system
US8310487B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 1, 2008 |
| Grant date | Nov 13, 2012 |
| Priority date | — |
| Expiry date | Aug 22, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T11/40
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and an apparatus are provided for combining multiple independent tile based graphic cores. An incoming geometry stream is split into a plurality of streams and sent to respective tile based graphics processing cores. Each one generates a separate tiled geometry lists. These may be combined into a master tiling unit or, alternatively, markers may be inserted into the tiled geometry lists which are used in the rasterization phase to switch between tiling lists from different geometry processing cores.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.