Suppression of row-wise noise in CMOS image sensors
US8310569B2 · kind B2 · utility
9Cited by
8References
21Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | May 21, 2007 |
| Grant date | Nov 13, 2012 |
| Priority date | — |
| Expiry date | Jun 18, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N25/78
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Embodiments of circuits and methods for suppressing row-wise noise in the analog domain in an image sensing device. In one embodiment, a pixel sampling circuit includes a readout circuit that is connected to a plurality of pixels to receive analog signals from the pixels. The pixel sampling circuit also includes a noise correction circuit that provides a reference signal to remove at least a portion of the noise in the analog signals received from the pixels before the analog signals are converted into digital signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.