Patent · US Active

Method for manufacturing a resistive switching memory cell comprising a nickel oxide layer operable at low-power and memory cells obtained thereof

US8310857B2 · kind B2 · utility

3Cited by

10References

14Claims

0Family size

Assignee

IMEC · BE

Inventors

Ludovic Goux · Hannut, BE
Judit Lisoni Reyes · Oud-Heverlee, BE
Dirk Wouters · Heverlee, BE

Key dates

Filing date	Jun 2, 2010
Grant date	Nov 13, 2012
Priority date	—
Expiry date	Dec 11, 2030

Classification

Technology area (CPC G)Physics
CPC primaryG11C2213/34
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A resistive switching non-volatile memory element is disclosed comprising a resistive switching metal-oxide layer sandwiched between and in contact with a top electrode and a bottom electrode, the resistive switching metal oxide layer having a substantial isotropic non-stoichiometric metal-to-oxygen ratio. For example, the memory element may comprise a nickel oxide resistive switching layer sandwiched between and in contact with a nickel top electrode and a nickel bottom electrode whereby the ratio oxygen-to-nickel of the nickel oxide layer is between 0 and 0.85.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.