Streamlined transcoder architecture
US8311114B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 6, 2006 |
| Grant date | Nov 13, 2012 |
| Priority date | — |
| Expiry date | Aug 14, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N19/48
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Systems and methods for a streamlined transcoder architecture. A transcoder system includes an encoder and a decoder. The encoder compares a decoded frame and a encoder reference frame to produce an output stream. The decoder produces the decoded frame including decoder reference frame and the encoder reference frame. The decoded frame is produced from an input stream, and the encoder reference frame is produced from the output stream of the encoder. In one embodiment, the encoder refines motion vectors, quantization, and macroblock type/mode from the input stream for reuse in the output stream. Furthermore, the decoded frames from the input stream can be modified in various ways including changing picture resolution and performing image enhancement on them before encoding.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.