Area efficient neuromorphic circuits using field effect transistors (FET) and variable resistance material
US8311965B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 18, 2009 |
| Grant date | Nov 13, 2012 |
| Priority date | — |
| Expiry date | May 6, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K19/202
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A neuromorphic circuit includes a first field effect transistor in a first diode configuration establishing an electrical connection between a first gate and a first drain of the first field effect transistor. The neuromorphic circuit also includes a second field effect transistor in a second diode configuration establishing an electrical connection between a second gate and a second drain of the second field effect transistor. The neuromorphic circuit further includes variable resistance material electrically connected to both the first drain and the second drain, where the variable resistance material provides a programmable resistance value. The neuromorphic circuit additionally includes a first junction electrically connected to the variable resistance material and providing a first connection point to an output of a neuron circuit, and a second junction electrically connected to the variable resistance material and providing a second connection point to the output of the neuron circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.