Method for patterning a metal layer and method for manufacturing semiconductor devices by using the same
US8314020B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 10, 2011 |
| Grant date | Nov 20, 2012 |
| Priority date | — |
| Expiry date | Apr 29, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D99/00
- WIPO fieldSurface technology, coating
- WIPO sectorChemistry
Abstract
Disclosed herein is a method for patterning a metal layer, which includes the following steps. A substrate having a metal layer thereon is provided. A patterned conductive polymeric layer is formed on the metal layer, wherein a portion of the metal layer is exposed by the patterned conductive polymeric layer. The substrate having the patterned conductive polymer layer is disposed in an electrolytic cell, so that the exposed portion of the metal layer is immersed in the electrolytic solution of the electrolytic cell. The anode of the electrolytic cell is electrically coupled to the patterned conductive polymeric layer, while the cathode of the electrolytic cell is immersed in the electrolytic solution. Sequentially, an electrical potential is applied across the anode and the cathode to perform an electrolysis reaction so that the exposed portion of the metal layer is dissolved in the electrolytic solution.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.