Semiconductor package and package-on-package semiconductor device
US8314492B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jul 19, 2010 |
| Grant date | Nov 20, 2012 |
| Priority date | — |
| Expiry date | Mar 15, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19043
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package includes a wiring board; a first electrode for external connection; a ball pad; a semiconductor chip; a mold resin; an electrode unit connected with the ball pad and penetrating the mold resin; and a second electrode for external connection connected with a portion of the electrode unit on a side of an outer surface of the mold resin. The electrode unit includes a first ball disposed on the ball pad; a second ball disposed between the first ball and the second electrode; and a solder material connecting between the ball pad and the first ball, between the first ball and the second ball, and between the second ball and the second electrode for external connection; each of the first ball and the second ball including a core part having a glass transition temperature which is higher than a melting point of the solder material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.