Patent · US Active

Time stamp generation

US8314726B2 · kind B2 · utility

1Cited by
14References
11Claims
0Family size

Assignee

Inventors

Key dates

Filing dateApr 7, 2011
Grant dateNov 20, 2012
Priority date
Expiry dateMay 30, 2031

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG04F10/005
  • WIPO fieldMeasurement
  • WIPO sectorInstruments

Abstract

A circuit and method for providing a digital output indicative of the time at which an event occurred is disclosed. In one aspect, the circuit includes a fine timing circuit configured to determine in which sub-interval of a clock period the event occurred, and a correction circuit configured to correct an erroneous offset between a first and second clock signals in the fine timing circuit. The correction circuit includes a synch circuit configured to determine in which half of the clock period the event occurred so as to correct for erroneous offset in the fine timing circuit.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.