Closed loop power normalized timing recovery for 8 VSB modulated signals
US8315345B2 · kind B2 · utility
0Cited by
19References
6Claims
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Key dates
| Filing date | Nov 1, 2010 |
| Grant date | Nov 20, 2012 |
| Priority date | — |
| Expiry date | Nov 1, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/0278
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A timing recovery loop includes a sampler, a narrow band filter, an RMS normalize, a timing error detector, and a sample controller. The sampler samples a received signal. The narrow band filter filters the sampled received signal so as to pass an upper band edge of the received signal and not a lower band edge of the received signal. The RMS normalize sets an average power level of an output of the filter to a substantially constant value. The timing error detector detects a timing error with respect to an output of the RMS normalize. The sample controller controls the sampler in response to the detected timing error.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.