Patent · US Active

Safe partition scheduling on multi-core processors

US8316368B2 · kind B2 · utility

12Cited by
7References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateFeb 5, 2009
Grant dateNov 20, 2012
Priority date
Expiry dateSep 23, 2031

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2209/483
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

One example is directed to a method of generating a set of schedules for use by a partitioning kernel to execute a plurality of partitions on a plurality of processor cores included in a multi-core processor unit. The method includes determining a duration to execute each of the plurality of partitions without interference and generating a candidate set of schedules using the respective duration for each of the plurality of partitions. The method further includes estimating how much interference occurs for each partition when the partitions are executed on the multi-core processor unit using the candidate set of schedules and generating a final set of schedules by, for at least one of the partitions, scaling the respective duration in order to account for the interference for that partition. The method further includes configuring the multi-core processor unit to use the final set of schedules to control the execution of the partitions using at least two of the cores.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.