Semiconductor wafer pre-process annealing and gettering method and system for solar cell formation

US8316745B2 · kind B2 · utility

Assignee

• Calisolar, Inc. · US

Inventors

• Fritz Kirscht · Berlin, DE
• Kamel Ounadjela · Belmont, US
• Jean Patrice Rakotoniaina · Halle (Saale), DE
• Dieter Linke · Berlin, DE

Key dates

• Filing date: Aug 26, 2011
• Grant date: Nov 27, 2012
• Expiry date: Aug 26, 2031

Classification

• Technology area (CPC Y): Emerging Cross-Sectional Technologies
• CPC primary: Y10T83/0453
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Techniques are here disclosed for a solar cell pre-processing method and system for annealing and gettering a solar cell semiconductor wafer having an undesirably high dispersion of transition metals, impurities and other defects. The process forms a surface contaminant layer on the solar cell semiconductor (e.g., silicon) wafer. A surface of the semiconductor wafer receives and holds impurities, as does the surface contaminant layer. The lower-quality semiconductor wafer includes dispersed defects that in an annealing process getter from the semiconductor bulk to form impurity cluster toward the surface contaminant layer. The impurity clusters form within the surface contaminant layer while increasing the purity level in wafer regions from which the dispersed defects gettered. Cooling follows annealing for retaining the impurity clusters and, thereby, maintaining the increased purity level of the semiconductor wafer in regions from which the impurities gettered. Multicrystalline semiconductor wafers having grain boundaries with impurities may also undergo the annealing and gettering of dispersed defects to the grain boundaries, further increasing the semiconductor substrate purity…