Testing circuit for an analog to digital converter
US8319509B1 · kind B1 · utility
4Cited by
3References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 30, 2012 |
| Grant date | Nov 27, 2012 |
| Priority date | — |
| Expiry date | Apr 30, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/12
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A testing circuit configures an analog to digital converter (ADC) to receive a test signal instead of a live input signal. The testing circuit compares an output test value from the ADC to an expected test value for the test signal. The testing circuit provides an expected live output value to a digital circuit instead of the output test value, thereby preventing the ADC from providing a value to the digital circuit not based on the live input signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.