Analog sampler with reduced input current
US8319527B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Apr 28, 2009 |
| Grant date | Nov 27, 2012 |
| Priority date | — |
| Expiry date | Jan 8, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/1245
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Methods and systems for analog to digital converter and systems incorporating the same are provided. Specifically, an analog sampler that has a reduced input current is disclosed. According to the present teaching, an apparatus for sampling an input voltage includes a first switch having its first terminal connected to an input voltage, and a first pre-charging circuit, coupled to a second terminal of the first switch, that provides a first pre-charged voltage that is substantially equal to the input voltage. The first pre-charged voltage is provided at the first terminal of the first switch before the first switch is turned on. The apparatus further includes a second pre-charging circuit coupled to both the first pre-charging circuit and the second terminal of the first switch, where the second pre-charging circuit charges the first pre-charged voltage prior to the first switch being turned on.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.