Compensation of loop-delay quantizer in continuous-time and hybrid sigma-delta analog-to-digital modulators
US8319674B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 5, 2010 |
| Grant date | Nov 27, 2012 |
| Priority date | — |
| Expiry date | Jan 4, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M3/452
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A summing-tracking quantizer additively combines multiple feed-forward outputs of cascaded integrator stages of a sigma-delta analog-to-digital converter with a scaled sampled analog signal, and a delayed scaled analog input signal. The summing tracking quantizer compensates for loop delay within a sigma-delta analog-to-digital converter. A loop delay compensation digital-to-analog converter for a sigma-delta analog-to-digital converter is merged with the voltage reference generator within the summing-tracking quantizer. The summing tracking quantizer selects reference voltages from the voltage reference generator based on a previous digital output code. The summing-tracking quantizer has a matrix switch that receives the previous digital output code and selects the reference voltage for applying to comparators for determining a differential quantization code that is additively combined to the previous digital output code to determine the present digital output code.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.