Patent · US Active

High speed cryptographic system with modular architecture

US8321687B2 · kind B2 · utility

6Cited by
10References
20Claims
0Family size

Assignee

Inventor

Key dates

Filing dateMar 9, 2009
Grant dateNov 27, 2012
Priority date
Expiry dateDec 29, 2030

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F21/72
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A cryptographic system with a modular architecture. Memory modules make it possible to store information concerning authentication keys, data and commands, including a secure memory module for containing the keys with integrity checking and an emergency erase function. Various types of algorithm modules perform cryptographic functions of the cryptographic system by executing the commands stored in at least one memory module. External interface modules are utilized that make it possible to produce the link between the cryptographic system and external devices, through a standard or proprietary input/output bus. A control unit is responsible for the supervision of the various algorithm modules and the management of the keys, and a central interconnect module assures handling of secure exchanges between blocks.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.