Power aware memory allocation
US8321703B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 12, 2009 |
| Grant date | Nov 27, 2012 |
| Priority date | — |
| Expiry date | Dec 22, 2030 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computer system may place memory objects in specific memory physical regions based on energy consumption and performance or other policies. The system may have multiple memory regions at least some of which may be powered down or placed in a low power state during system operation. The memory object may be characterized in terms of access frequency, movability, and desired performance and placed in an appropriate memory region. In some cases, the memory object may be placed in a temporary memory region and later moved to a final memory region for long term placement. The policies may allow some processes to operate while consuming less energy, while other processes may be configured to maximize performance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.