Efficient clocking scheme for a bidirectional data link
US8321719B2 · kind B2 · utility
1Cited by
11References
15Claims
0Family size
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Key dates
| Filing date | Sep 25, 2009 |
| Grant date | Nov 27, 2012 |
| Priority date | — |
| Expiry date | Nov 25, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/222
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for communication via a bidirectional data link between a processing device and a memory device. The memory device includes a clock source to generate a clock signal for driving a latching at the memory device of data to and/or from the bidirectional data link. The memory device provides the clock signal to the processing device for driving a latching at the processing device of data to and/or from the bidirectional data link.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.