TFT array substrate and manufacturing method thereof

US8324033B2 · kind B2 · utility

Assignee

• Beijing BOE Optoelectronics Technology Co., Ltd. · CN

Inventors

• Zhangtao Wang · Beijing, CN
• Haijun Qiu · Beijing, CN
• Tae Yup Min · Beijing, CN
• Seung Moo Rim · Beijing, CN

Key dates

• Filing date: Dec 18, 2007
• Grant date: Dec 4, 2012
• Expiry date: Jul 9, 2028

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D86/60

Abstract

A TFT array substrate and a manufacturing method thereof, where the TFT array substrate includes a substrate; a gate line and a gate electrode integrated therewith, which are covered by a gate insulating layer, a semiconductor layer, and a ohmic contact layer sequentially. An insulating layer is formed on the resulting substrate and on both sides of the gate line and the gate electrode, the gate insulating layer, the semiconductor layer, and the ohmic contact layer. A trench is then formed in the ohmic contact layer to divide the ohmic contact layer over the semiconductor layer. A data line and first and second source/drain electrodes are then formed on the insulating layer and the ohmic contact layer.