Nonvolatile memory device and method of manufacturing the same
US8324677B2 · kind B2 · utility
7Cited by
1References
10Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 11, 2010 |
| Grant date | Dec 4, 2012 |
| Priority date | — |
| Expiry date | Sep 16, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/667
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A nonvolatile memory device includes gate electrodes three dimensionally arranged on a semiconductor substrate, a semiconductor pattern extending from the semiconductor substrate and crossing sidewalls of the gate electrodes, a metal liner pattern formed between the semiconductor pattern and formed on a top surface and a bottom surface of each of the gate electrodes, and a charge storage layer formed between the semiconductor pattern and the metal liner pattern.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.