Patent · US Active

Memory system, controller, and method of controlling memory system

US8327065B2 · kind B2 · utility

16Cited by
0References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 24, 2009
Grant dateDec 4, 2012
Priority date
Expiry dateSep 10, 2031

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2212/7202
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A memory system according to an embodiment of the present invention includes a volatile first storing unit, a nonvolatile second storing unit, a controller that transfers data between a host apparatus and the second storing unit via the first storing unit. The memory system monitors whether data written from the host apparatus in the first storing unit has a specific pattern in management units. When data to be flushed to the second storing unit has the specific pattern, the memory system set an invalid address value that is not in use in the second storing unit to the data.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.