Integrated circuit device core power down independent of peripheral device operation
US8327173B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 17, 2007 |
| Grant date | Dec 4, 2012 |
| Priority date | — |
| Expiry date | Sep 29, 2029 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D30/50
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In an integrated circuit device, a circuit for maintaining asserted values on an input output pin of the device when a functional block of the device is placed in a sleep mode. The circuit includes an interface for coupling a functional block of a processor to an input and output pin and an output storage element coupled to the interface for storing a current value of the input output pin. The circuit further includes a sleep mode enable for controlling the output storage element to store the current value of the input output pin prior to the functional block being entering a sleep mode and cause the current value of the input output pin to remain asserted after the functional block is in sleep mode. The sleep mode enable is also to deactivate the storage element when the sleep mode is exited.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.