Integrated circuit with configurable test pins

US8327199B1 · kind B1 · utility

Assignee

• Altera Corporation · US

Inventors

• Jayabrata Ghosh Dastidar · Santa Clara, US
• Chiew Khiang Kuit · Bukit Mertajam, MY
• Siew Ling Yeoh · Bayan Lepas, MY
• Jun Tan · Kepong, MY
• Kok Sun Chia · Kuala Lumpur, MY
• Yee Liang Tan · Bukit Mertajam, MY
• Kar Keng Chua · Bukit Mertajam, MY

Key dates

• Filing date: Mar 5, 2010
• Grant date: Dec 4, 2012
• Expiry date: Feb 25, 2031

Classification

• Technology area (CPC G): Physics
• CPC primary: G01R31/318516
• WIPO field: Measurement
• WIPO sector: Instruments

Abstract

Integrated circuits (ICs) with configurable test pins and a method of testing an IC are disclosed. An IC has input/output (I/O) pins that can be configured either as a test input pin, a test output pin or a user I/O pin. Selector circuits are used to selectively route and couple the I/O pins to various logic blocks and test circuitry on the IC. Selector circuits are also used to selectively couple either a user output or a test output to different I/O pins on the IC. Switches are used to configure the selector circuits and route test signals within the IC. Different configurations of the switches determine how the signals are routed. Test input signals from an I/O pin may be routed to any test circuitry within the IC and test output signals from a test circuit may be routed to any I/O pin on the IC.