Blanking primitives masking circuit
US8327206B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Apr 30, 2010 |
| Grant date | Dec 4, 2012 |
| Priority date | — |
| Expiry date | Jun 2, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L12/40013
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A blanking primitive masking circuit has a detection and handling circuit that receives data containing blanking primitives. The detection and handling circuit generates a dynamic blanking signal when blanking primitives are detected. The received data is delayed and provided to a pattern detector that generates a synchronization signal provided to a memory and a phase sync signal provided to the detection and handling circuit and to a comparator. The comparator receives reference data from the memory, the delayed data, and the dynamic blanking signal. The comparator compares the reference data with the delayed data and generates bit error outputs from mismatched reference data bits and delayed data bits when the dynamic blanking signal from the detection and handling circuit is absent and suppressing the generation bit error outputs when the blanking primitive are in the delay data and the dynamic blanking signal is present.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.