Patent · US Active

Reduced processing in high-speed Reed-Solomon decoding

US8327241B2 · kind B2 · utility

3Cited by

4References

21Claims

0Family size

Assignee

Link—A—Media Devices Corporation · US

Inventors

Yingquan Wu · Palo Alto, US
Meng Kun Lee · Cupertino, US
Kwok W. Yeung · Milpitas, US

Key dates

Filing date	Feb 10, 2010
Grant date	Dec 4, 2012
Priority date	—
Expiry date	Jan 20, 2031

Classification

Technology area (CPC H)Electricity
CPC primaryH03M13/6561
WIPO fieldBasic communication processes
WIPO sectorElectrical engineering

Abstract

Processing polynomials is disclosed. At least a portion of processing associated with an error evaluator polynomial and at least a portion of processing associated with an error locator polynomial are performed simultaneously. The error evaluator polynomial and the error locator polynomial are associated with Berlekamp-Massey processing. Data associated with the error evaluator polynomial is removed, including by shifting data in an array so that at least one element in the array is emptied in a shift.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.