Apparatus for coding at a plurality of rates in multi-level flash memory systems, and methods useful in conjunction therewith
US8327246B2 · kind B2 · utility
60Cited by
76References
22Claims
0Family size
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Key dates
| Filing date | Sep 17, 2008 |
| Grant date | Dec 4, 2012 |
| Priority date | — |
| Expiry date | Nov 7, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/5002
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and system for writing in flash memory, the system operative for, and the method comprising, writing data onto a plurality of logical pages characterized by a plurality of different probabilities of error respectively, the writing including encoding data intended for each of the plurality of physical pages using a redundancy code with a different code rate for each individual physical page, the code rate corresponding to the probability of error in the individual logical page.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.