Patent · US Active

Display panel including dummy pixels and display device having the panel

US8330691B2 · kind B2 · utility

15Cited by

10References

16Claims

0Family size

Assignee

SHARP KABUSHIKI KAISHA · JP

Inventors

Kazunori Tanimoto · Osaka, JP
Junichi Morinaga · Sakai, JP

Key dates

Filing date	Apr 11, 2007
Grant date	Dec 11, 2012
Priority date	—
Expiry date	Dec 2, 2029

Classification

Technology area (CPC G)Physics
CPC primaryG09G2320/0233
WIPO fieldOptics
WIPO sectorInstruments

Abstract

A dummy line, which is disposed in a dummy pixel region (2) on the side of a test wiring region (1) and which has a parasitic capacitance effect like that of an adjacent scanning line (Gj) in an effective display region (3), is commonly used as a test switch line (1a). This test switch line (1a) is provided away from a dummy scanning line (DG) by intervals at which the scanning lines (Gj) are provided in the effective display region (3). As a result, it is possible to realize a display panel capable of reducing a frame area while keeping a test circuit region and the dummy pixel region in the frame area, and a display device having the display panel.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.