Timer controlled, short and open circuit fault detection with slew-rate boosted output driver
US8331072B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 25, 2010 |
| Grant date | Dec 11, 2012 |
| Priority date | — |
| Expiry date | Mar 28, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45248
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A driver circuit uses a feedback loop having a programmable timer and timer logic to adjust a slew rate delay period used to accommodate slewing current when charging or discharging a load capacitor, and to increase the current limit during the slew rate delay period by selecting a larger input current reference value. Increasing the current limit provides for a faster settling time. The value of each input current reference value can be programmed. The programmable timer and the timer logic can be configured to coordinate the slew rate delay period and the selected input current reference value. The slew rate delay period can be adjusted based on which input current reference value is applied.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.