Nonvolatile semiconductor memory device
US8331137B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 16, 2011 |
| Grant date | Dec 11, 2012 |
| Priority date | — |
| Expiry date | Sep 16, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/76
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
According to one embodiment, a nonvolatile semiconductor memory device includes a memory cell includes a variable resistance element and a capacitor connected in series between first and second conductive lines, and a control circuit applying one of first and second voltage pulses to the memory cell. The capacitor is charged by a leading edge of one of the first and second voltage pulses, and discharged a trailing edge of one of the first and second voltage pulses. The control circuit makes waveforms of the trailing edges of the first and second voltage pulses be different, changes a resistance value of the variable resistance element from a first resistance value to a second resistance value by using the first voltage pulse, and changes the resistance value of the variable resistance element from the second resistance value to the first resistance value by using the second voltage pulse.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.