Nonvolatile memory system using data interleaving scheme
US8332569B2 · kind B2 · utility
3Cited by
1References
20Claims
0Family size
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Key dates
| Filing date | Jun 22, 2010 |
| Grant date | Dec 11, 2012 |
| Priority date | — |
| Expiry date | Jun 14, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/32
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory system comprises a plurality of nonvolatile memory devices configured for interleaved access. Programming times are measured and recorded for various memory cell regions of the nonvolatile memory devices, and interleaving units are formed by memory cell regions having different programming times.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.