Patent · US Active

Latency based platform coordination

US8332675B2 · kind B2 · utility

8Cited by
3References
15Claims
0Family size

Assignee

Inventors

Key dates

Filing dateAug 19, 2011
Grant dateDec 11, 2012
Priority date
Expiry dateAug 19, 2031

Classification

  • Technology area (CPC Y)Emerging Cross-Sectional Technologies
  • CPC primaryY02D10/00
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

In some embodiments, an electronic apparatus comprises at least one processor, a plurality of components, and a policy engine comprising logic to receive latency data from one or more components in the electronic device, compute a minimum latency tolerance value from the latency data, and determine a power management policy from the minimum latency tolerance value.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.