Variable attenuator having stacked transistors
US8334718B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 23, 2010 |
| Grant date | Dec 18, 2012 |
| Priority date | — |
| Expiry date | Jan 3, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In one embodiment, a variable attenuator is disclosed having an attenuation circuit and a control circuit. The attenuation circuit may include a first series connected attenuation circuit segment and a shunt connected attenuation circuit segment, as well as additional attenuation circuit segments. Each attenuation circuit segment includes a stack of transistors that are coupled to provide the attenuation circuit segment with a variable impedance level having a continuous impedance range. In this manner, the control circuit may be operably associated with the stack of transistors in each attenuation circuit segment to control the variable attenuation level of the variable attenuator.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.