Patent · US Active

Methods and system for verifying memory device integrity

US8335951B2 · kind B2 · utility

15Cited by
19References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMay 6, 2010
Grant dateDec 18, 2012
Priority date
Expiry dateMar 22, 2031

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG11C2029/0411
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A method for verifying memory device integrity includes identifying at least one memory block corresponding to at least one memory location within a memory device. The memory block is associated with a prior checksum. It is determined whether the first memory block is designated read-only. A current checksum is calculated based at least in part on data within the memory block. When the first memory block is designated read-only, and the prior checksum represents expected data within the first memory block, it is determined whether the current checksum is equal to the prior checksum. When the current checksum is not equal to the prior checksum, a verification failure for the first memory block is indicated via a notification interface. A system for verifying memory device integrity is also disclosed.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.