Low resistance through-wafer via
US8338957B2 · kind B2 · utility
27Cited by
1References
19Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jun 27, 2008 |
| Grant date | Dec 25, 2012 |
| Priority date | — |
| Expiry date | May 24, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/09854
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The present invention provides a wafer (3) comprising a through-wafer via (7) through the wafer (3) formed by a through-wafer via hole (9) and at least a first conductive coating (25). A substantially vertical sidewall (11) of the through-wafer via hole (9) except for a constriction (23) provides a reliable through-wafer via (7) occupying a small area on the wafer. The wafer (3) is preferably made of a semiconductor material, such as silicon, or a glass ceramic. A method for manufacturing such a wafer (3) is described.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.