Circuitry including matched transistor pairs
US8339197B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 2, 2010 |
| Grant date | Dec 25, 2012 |
| Priority date | — |
| Expiry date | Dec 18, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45588
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Matched bipolar transistor pairs for use in differential transistor pair circuitry, current mirror transistor pair circuitry and voltage reference transistor pair circuitry are disclosed. Each transistor in the pair includes a base, emitter and a collector region and a doped polysilicon emitter contact, a metal emitter contact and an metal emitter interconnect which makes an electrical connection to the emitter region by way of the metal emitter contact and the polysilicon emitter contact. The metal emitter interconnect is displaced latterly away from the emitter region so that no part of the metal emitter interconnect overlies any portion of the emitter region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.