Code generation in the presence of paged memory
US8341609B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 26, 2007 |
| Grant date | Dec 25, 2012 |
| Priority date | — |
| Expiry date | Dec 10, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/45504
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computer is programmed to automatically identify multiple sequences of executable code such that each sequence fits within a page of memory. When the executable code comprising several sequences is loaded into the paged memory, each sequence is placed in its own page. The computer is further programmed to prepare a number of structures which identify a corresponding number of instructions that transfer control between sequences. Each structure identifies at least a control transfer instruction in one sequence and a target in another sequence. When loading the sequences into memory, the structures are used to replace destination addresses of control transfers between sequences with new addresses derived from base addresses of pages that have been allocated in memory to hold the sequences.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.