Semiconductor device comprising oxide semiconductor layer
US8344374B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 5, 2010 |
| Grant date | Jan 1, 2013 |
| Priority date | — |
| Expiry date | Dec 31, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D99/00
Abstract
It is an object to provide a semiconductor device typified by a display device having a favorable display quality, in which parasitic resistance generated in a connection portion between a semiconductor layer and an electrode is suppressed and an adverse effect such as voltage drop, a defect in signal wiring to a pixel, a defect in grayscale, and the like due to wiring resistance are prevented. In order to achieve the above object, a semiconductor device according to the present invention may have a structure where a wiring with low resistance is connected to a thin film transistor in which a source electrode and a drain electrode that include metal with high oxygen affinity are connected to an oxide semiconductor layer with a suppressed impurity concentration. In addition, the thin film transistor including the oxide semiconductor may be surrounded by insulating films to be sealed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.