Method of manufacturing localized semiconductor-on-insulator (SOI) structures in a bulk semiconductor wafer
US8344453B2 · kind B2 · utility
6Cited by
7References
16Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Oct 14, 2008 |
| Grant date | Jan 1, 2013 |
| Priority date | — |
| Expiry date | Jul 11, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/02661
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming a localized SOI structure in a substrate (10) wherein a trench (18) is formed in the substrate, and a dielectric layer (20) is formed on the base of the trench (18). The trench is filled with semiconductor material (22) by means of epitaxial growth.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.