Signaling buffer fullness
US8345754B2 · kind B2 · utility
17Cited by
33References
24Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 2, 2004 |
| Grant date | Jan 1, 2013 |
| Priority date | — |
| Expiry date | Jun 4, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N19/70
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Techniques and tools are described for signaling hypothetical reference decoder parameters for video bitstreams, including signaling of buffer fullness. For example, a buffer size syntax element indicates a decoder buffer size, and a buffer fullness syntax element indicates a buffer fullness as a fraction of the decoder buffer size. As another example, buffer fullness is signaled in one or more entry point headers and other hypothetical reference decoder parameters are signaled in a sequence header.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.