Channel stacking system and method of operation
US8345798B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 31, 2009 |
| Grant date | Jan 1, 2013 |
| Priority date | — |
| Expiry date | Apr 23, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04H40/90
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A channel stacking system includes first and second downconverting stages, first and second analog to digital converters, and a digital switching and signal processor. The first downconverting stage includes a first downconverter circuit having an input for receiving a first RF input signal which includes a multitude of first channels. The first downconverter circuit frequency downconverts the first RF input signal to a first IF signal which includes the multitude of first channels. The first analog-to-digital converter converts the first IF signal to a first digital IF signal. The second downconverter stage includes a second downconverter circuit having an input for receiving a second RF input signal which includes a multitude of second channels. The second downconverter circuit frequency downconverts the second RF input signal to a second IF signal including said multitude of second channels.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.