Glitchless clock multiplexer controlled by an asynchronous select signal
US8350600B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Nov 10, 2005 |
| Grant date | Jan 8, 2013 |
| Priority date | — |
| Expiry date | Nov 21, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/36
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A glitchless clock multiplexer controlled by an asynchronous select signal for use in GPS receivers is disclosed. A device in accordance with the present invention comprises a device for producing a clock signal, the clock signal being selected from a plurality of asynchronous frequency sources. A device in accordance with the present invention comprises a first frequency source, a second frequency source, a select signal, wherein the select signal is asynchronous with the first frequency source, and a multiplexer, which receives the first frequency source and the second frequency source, wherein the multiplexer selects as an output of the multiplexer one of the first frequency source and the second frequency source based on a value of the select signal, such that when the multiplexer switches between the first frequency source and the second frequency source, and between the second frequency source and the first frequency source, the transition is performed when the output of the multiplexer is at a logic low.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.