Sample time correction for multiphase clocks
US8351559B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Apr 13, 2010 |
| Grant date | Jan 8, 2013 |
| Priority date | — |
| Expiry date | Feb 19, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/00
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Systems and methods are provided to permit indirect measurements of sample time errors using multiphase interpolator clocks generated from a local reference clock in clock recovery blocks of high speed data receivers. The multiphase interpolator clocks are adjusted to have substantially evenly spaced phase offsets within a data period of the local reference clock. A small frequency offset between the transmitter clock and the local reference clock causes transition edges of received data to drift slowly across the interpolated clocks. Differences in phase offsets between the interpolated clocks may be determined with high resolution by counting the number of data transitions occurring between pairs of interpolated clocks over a long period of time. Phase offsets are adjusted to make the data transition counts substantially the same for the interpolated clocks. Data recovery may then be facilitated by selecting an interpolated clock with a sampling edge that is closest to the center of a data period to sample the received data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.